From Microseconds to Weeks: The Timescale Problem That Makes Quantum Computing Impossible Right Now — if not forever!
Start at the nanosecond. End at the week. Watch what happens at each step
The single most clarifying way to understand why quantum computing cannot do what it is advertised to do — and why the gap between demonstration and capability is not a matter of engineering polish but of physics stacked against physics — is to follow the numbers through the timescales.
Start at the nanosecond. End at the week. Watch what happens at each step. By the time you arrive at the week, you will understand precisely why the encryption-cracking, drug-simulating, world-changing quantum computer is not coming soon, and why every “milestone” announced along the way is a demonstration of the problem rather than a solution to it.
Layer One: The Physical Gate — Nanoseconds
A qubit, at the physical level, is a quantum system with two distinguishable states. In the most advanced and widely deployed platform — superconducting circuits, which Google, IBM, and most of the major commercial players use — the qubit is a tiny superconducting loop cooled to approximately fifteen millikelvin, colder than deep space. At that temperature, the circuit exhibits quantum behaviour: superposition, entanglement, interference.
Operating on that qubit requires applying a precisely shaped microwave pulse. A single-qubit gate — rotating the qubit’s state on the Bloch sphere — takes roughly ten to fifty nanoseconds. A two-qubit gate, the operation that creates entanglement between two qubits and is the workhorse of quantum computation, takes roughly one hundred to five hundred nanoseconds on current superconducting hardware.
These are fast. Ten nanoseconds is ten billionths of a second. A modern classical processor running at three gigahertz executes a clock cycle in about three hundred picoseconds — faster than a quantum gate by a factor of thirty or so — but classical processors execute many operations in parallel and do not require the elaborate control apparatus quantum gates need. For quantum gates, the relevant comparison is not classical clock speed but qubit lifetime.
The gate time is the denominator of the most important ratio in quantum computing: the error rate per gate. If a gate takes one hundred nanoseconds and the qubit survives for one thousand nanoseconds before an error occurs, the error probability per gate is approximately one in ten — ten percent — which is catastrophically high. No useful computation survives ten percent per-gate error rates. The entire purpose of making gates faster, and making qubits last longer, is to drive this ratio down.
Current state-of-the-art superconducting qubits have single-qubit gate times around ten to twenty nanoseconds and two-qubit gate times around one hundred to three hundred nanoseconds. Physical qubit coherence times — the duration over which the qubit maintains its quantum state before errors inevitably occur — range from roughly fifty microseconds to five hundred microseconds for the best current systems.
The ratio: a hundred-nanosecond two-qubit gate on a qubit that lives five hundred microseconds gives a per-gate error rate of roughly 0.02%. The best demonstrated two-qubit gate error rates on superconducting hardware are around 0.1% — one error per thousand gates. This is close to the surface code fault-tolerance threshold of approximately 1%, with comfortable but not enormous margin.
That sounds like progress. It is progress. The problem begins at the next layer.
Layer Two: The Coherence Wall — Microseconds
Fifty microseconds. Five hundred microseconds. These are the timescales over which a physical qubit holds its quantum state before environmental noise — phonons, electromagnetic fluctuations, stray magnetic fields, charge noise, cosmic rays — destroys the superposition.
Fifty microseconds is fifty millionths of a second. It is the time it takes light to travel fifteen kilometres. It is the time a housefly moves less than a millimetre. It is nothing. It is also, in the world of quantum computing, simultaneously not enough and better than it sounds.
Not enough because: a two-qubit gate takes roughly two hundred nanoseconds. In fifty microseconds, you can run approximately two hundred and fifty two-qubit gates before the qubit has decohered with near-certainty. Two hundred and fifty gates is not enough to do anything useful. The most trivial quantum algorithm of potential interest requires thousands to millions of gates.
Better than it sounds because: you do not need the qubit to survive the entire computation. You need it to survive long enough to detect and correct errors before they propagate. This is the premise of quantum error correction. Run the gate. Immediately check for errors. Correct. Run the next gate. Check. Correct. The qubit is continuously refreshed by the error correction cycle.
But now look at what that cycle costs.
Layer Three: The Error Correction Cycle — Still Microseconds, But Stacking
The surface code is the leading error correction scheme for superconducting qubits. In the surface code, a logical qubit is encoded in a two-dimensional array of physical qubits — data qubits that hold the information, and ancilla qubits interspersed between them that are used to measure error syndromes.
An error correction cycle in the surface code works as follows. The ancilla qubits are entangled with their neighbouring data qubits through a sequence of controlled-NOT gates. The ancillas are then measured. The measurement outcomes — the syndrome — tell you whether an error has occurred on a nearby data qubit, without revealing the actual logical information stored in the code. You take the syndrome, run it through a classical decoding algorithm to determine what error most likely occurred, and apply a correction.
The duration of one surface code cycle on superconducting hardware: approximately one microsecond. This is the figure used in the Gidney-Ekerå resource estimation papers, and it is roughly consistent with demonstrated cycle times in Google’s and IBM’s systems.
One microsecond. One millionth of a second. This sounds fast, but let us look at what it contains.
A surface code cycle for a distance-d code — where d is the code distance, the minimum number of physical errors required to cause a logical error — requires the following steps in sequence: prepare the ancilla qubits, apply a sequence of controlled-NOT gates between ancillas and data qubits (four gates per ancilla for the standard surface code), measure the ancillas, read the measurement results out classically, and then — critically — process the syndrome classically to determine the correction and apply it.
For a distance-3 surface code (the minimum distance that provides any genuine error correction benefit), the data qubit array is nine physical qubits arranged in a three-by-three grid, with eight ancilla qubits interspersed, for a total of seventeen physical qubits per logical qubit. One error correction cycle takes approximately one microsecond.
For the distance-25 surface code — the code distance required to achieve logical error rates low enough for the Shor’s algorithm computation we discussed — each logical qubit requires approximately 1,250 physical qubits, and each error correction cycle still takes approximately one microsecond.
So: one microsecond per correction cycle, 1,250 physical qubits per logical qubit, distance-25 surface code.
Now we need to figure out how many correction cycles a useful computation requires.
Layer Four: The Classical Control Problem — The Hidden Microsecond Killer
Before we get to gate counts and computation time, we need to stop at the classical control problem, because it is one of the least discussed and most serious barriers in the field.
The surface code error correction cycle requires a classical decoder — a classical computer — to receive the syndrome measurements, run a minimum-weight perfect matching algorithm or equivalent, determine the most likely error pattern, and output a correction. This must happen within the coherence time of the physical qubits, because if the correction comes after the qubit has already suffered another error, you lose track of the error chain and the correction fails.
For superconducting qubits with microsecond coherence times, the classical decoder must process the syndrome and output a correction within approximately ten microseconds — the “reaction time” assumed in the Gidney-Ekerå papers. This is not a comfortable margin. It is a hard deadline.
Running a minimum-weight perfect matching decoder for a distance-25 surface code in real time, within ten microseconds, for a million physical qubits simultaneously — each logical qubit running its own correction cycle — requires classical processing throughput that does not currently exist in any demonstrated system.
Google’s 2023 paper on their surface code implementation acknowledged this explicitly: they used a simplified decoder (union-find rather than minimum-weight perfect matching) specifically because minimum-weight perfect matching was too slow for real-time operation at their qubit count. Union-find is faster but has higher logical error rates for a given code distance.
IBM, Google, and others are investing heavily in custom ASIC decoders designed specifically for this problem. Progress is real. But at the scale required for cryptographically relevant computation — a million physical qubits, each running a correction cycle every microsecond, each generating syndrome bits that must be processed within ten microseconds — the classical control infrastructure required is equivalent to a specialised supercomputer running continuously inside a cryogenic system. It does not exist. Its design has not been finalised. Its power consumption and heat generation at scale would create additional engineering problems inside or adjacent to the dilution refrigerators keeping the qubits cold.
This is a problem that the timescale discussion forces into visibility. When you say “one microsecond per correction cycle,” you are implicitly assuming a classical decoder operating at one megahertz on syndrome data from millions of qubits simultaneously. That assumption is not currently justified by any demonstrated hardware.
Layer Five: The Logical Gate — Microseconds Becoming Milliseconds
A logical gate is not a physical gate. A logical gate — an operation on a logical qubit encoded in the surface code — is implemented by a sequence of physical gate operations and error correction cycles.
The simplest logical gates in the surface code — the Clifford gates: logical Hadamard, logical CNOT, logical Pauli operations — can be implemented transversally, meaning each physical qubit in the code is operated on simultaneously. A transversal logical gate takes approximately the same time as a single physical gate operation, plus the overhead of the error correction cycle required to verify it: roughly one to a few microseconds.
But the most important gate for universal quantum computation — the T gate, the π/8 rotation that makes the gate set non-Clifford and therefore not classically simulable — cannot be implemented transversally in the surface code. This is a theorem, not an engineering limitation. The Eastin-Knill theorem proves that no code can implement a universal transversal gate set. For the surface code specifically, the T gate requires a separate resource called a magic state.
A magic state is a specific quantum state that, when consumed in a particular circuit, implements the T gate on a logical qubit. Producing a high-fidelity magic state from noisy physical qubits requires a process called magic state distillation: you take many low-quality magic states, run them through a distillation circuit that combines them, discard failed rounds, and eventually extract a single high-quality magic state. This is expensive.
How expensive? The standard magic state distillation protocol (the 15-to-1 protocol) takes fifteen noisy magic states and produces one with quadratically lower error rate, consuming on the order of a hundred surface code cycles in the process. At one microsecond per cycle, that is approximately one hundred microseconds per T gate, assuming a code distance that gives sufficient fidelity. For the code distances required for RSA-2048 computation, the distillation takes longer — on the order of a thousand to ten thousand surface code cycles depending on the required fidelity — meaning each T gate costs milliseconds.
Gidney’s 2025 paper uses magic state cultivation rather than distillation to reduce this overhead substantially. But even with cultivation, each non-Clifford gate requires many surface code cycles, and the total gate count for RSA-2048 involves hundreds of billions of Toffoli gates (each Toffoli requiring multiple T gates), which means the total time is dominated by the cost of generating the required magic states.
The transition from microseconds to milliseconds happens here: at the T gate. One physical gate takes nanoseconds. One logical Clifford gate takes microseconds. One logical T gate — even with modern optimisation — takes milliseconds. And the RSA-2048 computation requires billions of them.
Layer Six: The Full Computation — Milliseconds Becoming Hours, Hours Becoming Days, Days Becoming Weeks
Let us now follow the arithmetic from milliseconds to weeks.
The Gidney-Ekerå 2021 resource estimate for RSA-2048 factoring involves, at its core, running modular exponentiation — the heart of Shor’s algorithm — on a 2048-bit number. Their optimised circuit requires approximately 2.6 billion Toffoli gates. Each Toffoli gate is equivalent to three T gates. So the computation requires on the order of eight billion T gates.
The Gidney-Ekerå construction uses 20,000 logical qubits and achieves massive parallelism — running many T gates simultaneously across the logical qubit array — which is why they get the eight-hour estimate despite the billions of T gate operations. At any given moment, they are running approximately one million surface code cycles per second (one per microsecond), but across thousands of logical qubits in parallel, so the effective throughput of logical operations per second is high.
The 2025 optimised construction uses fewer logical qubits and less parallelism, trading hardware for time. It still requires billions of Toffoli operations but executes them more sequentially with fewer simultaneous magic state factories, resulting in a runtime under one week rather than eight hours.
Now let us examine what “under one week” means for the hardware.
A week is 604,800 seconds. At one microsecond per surface code cycle, that is 604,800,000,000 — about 600 billion — correction cycles per qubit. Each physical qubit in the system participates in approximately 600 billion correction cycles during the computation. Each cycle requires: ancilla preparation, four to eight controlled-NOT gates, ancilla measurement, and classical decoding. That is on the order of several trillion individual physical gate operations per qubit, across approximately one million physical qubits, sustained continuously for seven days.
A single physical gate error rate of 0.1% means that in 600 billion cycles, a given physical qubit participates in operations with an expected number of errors of approximately 600 billion × 0.001 = 600 million raw physical errors across the system during the week-long computation. The entire point of error correction is to catch and fix these before they become logical errors. For this to work, the logical error rate per error correction cycle must be far below 1 divided by the total number of correction cycles, so that the probability of even a single logical error occurring during the entire computation is acceptably small.
This requires code distances of roughly 25 to 30 for the physical error rates being discussed — which means, as noted earlier, approximately 1,250 physical qubits per logical qubit. And it requires that 0.1% error rate to be the actual error rate of every gate in the system, uniformly, for seven days continuously, in a million-qubit device.
The word “uniformly” is doing enormous work in that sentence. In a real device, error rates are not uniform. They vary qubit by qubit, gate by gate, time of day, temperature fluctuation, vibration, electromagnetic interference. Calibrating a hundred-qubit superconducting processor to 0.1% uniform two-qubit gate fidelity is already a multi-day process that drifts within hours. Maintaining that calibration across a million qubits for seven days of continuous operation is not an engineering challenge on the current roadmap. It is a specification for a machine that has not been conceived in detail, let alone built.
Layer Seven: The Dilution Refrigerator — The Physical Container of All These Timescales
All of this happens at fifteen millikelvin. That temperature requires a dilution refrigerator, a piece of apparatus that uses the quantum properties of helium-3 and helium-4 isotope mixtures to achieve temperatures colder than anywhere known in the natural universe.
Current dilution refrigerators capable of hosting superconducting qubit chips cool a sample space of a few litres. The largest systems demonstrated at research scale — Google’s and IBM’s — have chips with areas on the order of a few square centimetres, hosting several hundred to a few thousand qubits. Scaling to a million qubits on a superconducting platform requires either dramatically larger dilution refrigerators (which become increasingly difficult to engineer as the volume grows, because thermal conductance and vibration isolation both degrade) or a modular architecture connecting many refrigerators through quantum interconnects that must themselves operate at cryogenic temperatures with low error rates.
IBM’s roadmap for a million-qubit system involves a modular architecture. The inter-module connections — quantum links between separate cryogenic modules — have not been demonstrated at the gate fidelities required for fault-tolerant computation. The connection fidelity in current demonstrations is below the threshold required for surface code operation. This is another layer of the problem that the timescale analysis forces into view: between the microsecond correction cycle and the week-long computation, there is the physical container question of how you build a system that holds a million physical qubits at fifteen millikelvin, connected with sufficient fidelity, calibrated and stable for seven days.
The answer is: we do not know. The architecture is proposed. The components are being developed. None of them has been demonstrated at the required scale or fidelity.
How Different Platforms Handle the Timescales Differently — And Why None of Them Solves the Problem
The timescale analysis looks different for different qubit platforms. It is worth working through the alternatives, because the industry points to them as potential routes around the superconducting bottlenecks.
Trapped ions have dramatically longer coherence times than superconducting qubits — seconds to minutes, compared to microseconds. A trapped ytterbium or barium ion in a vacuum chamber can maintain quantum coherence for a minute or more. This seems to solve the coherence problem. But the gate time for trapped ions is proportionally longer: a two-qubit gate in a trapped ion system takes roughly one hundred microseconds to one millisecond, compared to one hundred nanoseconds for superconducting. The ratio — gate time divided by coherence time — is similar. The error rate per gate is comparable.
More critically, the gate speed for trapped ions is intrinsically limited by the motional modes of the ion chain. You cannot make an ion gate arbitrarily fast without inducing off-resonant excitation of other modes, which causes errors. The fundamental physics caps gate speeds around the kilohertz range — thousands of gates per second — compared to the megahertz range for superconducting. A surface code correction cycle that takes one microsecond on a superconducting platform takes one millisecond on a trapped ion platform. A week-long computation on a superconducting platform becomes a decade-long computation on a trapped ion platform, all else being equal.
Trapped ions solve the coherence problem by accepting a proportional slowdown in gate speed. The ratio does not improve. The absolute timescales for a large-scale computation get worse.
Silicon nuclear spins, the platform in the Zhang et al. paper that opened this series, have the longest coherence times of any solid-state platform — the paper reports approximately 523 microseconds for the nuclear spins in a phosphorus donor cluster in silicon-28, and in other silicon systems, nuclear spin coherence times can reach milliseconds to seconds. The reason is that nuclear spins couple weakly to their environment, which is both their strength and their problem.
Weak coupling to the environment means long coherence. It also means slow gates. The NMR pulses used to drive nuclear spin qubits take microseconds to milliseconds, compared to nanoseconds for superconducting gates. The ESR-mediated CCCCZ gates in the Zhang et al. system take longer still, and the five-spin system they demonstrated required careful pulse engineering just to run a circuit that fits within the coherence window.
More fundamentally, the two-qubit gate mechanism in donor silicon — electron spin resonance mediating nuclear-nuclear interactions through the hyperfine coupling to a shared electron — requires the electron to be near both nuclei. This architecture does not scale straightforwardly to large qubit arrays: the electron must be shared, the geometry is constrained, and extending the high-connectivity CCCCZ gate to an array of many donor clusters requires solving problems of inter-cluster coupling that are open research questions.
Neutral atoms — the platform used by QuEra, Atom Computing, and others — sit somewhere between the extremes. Coherence times are on the order of seconds. Gate times for two-qubit operations using Rydberg interactions are on the order of microseconds. The ratio is favourable, and the platform has the unique advantage of reconfigurability: atoms can be physically moved between sites using optical tweezers, allowing all-to-all connectivity that reduces circuit depth for some algorithms.
The problems: Rydberg two-qubit gate fidelities are currently around 99% — below the surface code threshold at which logical error rates begin to improve with code distance. Atom loss, where an atom falls out of the trap and must be replaced, is a distinct error mode without a simple analogue in other platforms. And the optical systems required for large-scale neutral atom processors — thousands of independent tweezers, precisely controlled — are a significant engineering challenge.
None of these platforms solves the fundamental timescale problem. They each trade one dimension of it for another. The coherence-to-gate-speed ratio that determines per-gate error rates is comparable across platforms. The absolute gate speed determines how many operations you can fit before decoherence, but for fault-tolerant computation where decoherence is managed by error correction, the absolute computation time is dominated by the number of correction cycles required, which scales with the number of logical gates, which does not depend on the platform — only on the algorithm.
Two billion Toffoli gates is two billion Toffoli gates whether you are running on superconductors or ions or atoms. The platform determines how fast you can run each cycle. None of the current platforms runs fast enough to make the required number of cycles complete in a short time without the massive parallelism of millions of physical qubits that are simultaneously required for error correction.
The Cascade in a Single Picture
Let us put the full cascade in one place.
Physical gate time: 10–500 nanoseconds (superconducting), 100 microseconds–1 millisecond (trapped ions), 1–10 microseconds (neutral atoms).
Physical qubit coherence time: 50–500 microseconds (superconducting), seconds–minutes (trapped ions), 1–10 seconds (neutral atoms).
Error rate per gate: ~0.1–1% (all platforms, best demonstrated, not at scale).
Surface code cycle time: ~1 microsecond (superconducting), ~1 millisecond (trapped ions), ~10–100 microseconds (neutral atoms).
Logical qubit overhead at threshold error rate: ~1,000 physical qubits per logical qubit (distance ~25 surface code at 0.1% physical error rate).
Time per logical Clifford gate: ~1–10 microseconds (dominated by surface code cycle overhead).
Time per logical T gate (magic state distillation/cultivation): ~1–100 milliseconds (dominated by distillation rounds).
Logical T gates required for RSA-2048: ~8 billion.
Total T gate time at 1 millisecond each, fully sequential: 8 billion milliseconds = 8 million seconds = 92 days. This is why parallelism — running many magic state factories simultaneously — is required to get to hours or days rather than years.
Parallelism required to achieve the Gidney-Ekerå 8-hour estimate: thousands of simultaneous magic state factories, meaning hundreds of thousands to millions of physical qubits dedicated purely to producing magic states while the computation proceeds.
Physical qubits required: 20 million (Gidney-Ekerå 2021, for 8-hour computation) or under 1 million (Gidney 2025, for under-one-week computation with less parallelism).
Current demonstrated physical qubit count at required error rates: a few hundred to a few thousand, not at the required uniformity and not sustained for the required duration.
Current logical qubit count: zero.
Gap: three to four orders of magnitude in physical qubit count, an unmeasured number of orders of magnitude in uniformity and stability, and the entire stack of unsolved engineering problems between here and the first working logical qubit.
What “Years if Not Decades” Actually Means
When someone says quantum computing is years or decades away from cracking encryption, they are not being imprecise about a technology that is almost ready. They are describing a stack of the following:
First, a working logical qubit must be built — one that outperforms its physical components in both coherence and gates without postselection. This has never been done. The expected timeline has no empirical basis, because the technical preconditions are not all met and there is no demonstrated scaling path.
Second, the logical qubit must be demonstrated to improve as code distance increases. This is the core of fault-tolerance theory and it has been suggested in one memory experiment but never demonstrated in gates at relevant scale.
Third, thousands of logical qubits must be integrated into a single system. This requires millions of physical qubits operating at uniform sub-threshold error rates, with classical control infrastructure running at real-time speeds that does not currently exist.
Fourth, that system must sustain error-corrected operation continuously for days to weeks — the duration required by the best algorithmic estimates — without hardware failures, calibration drift, or environmental perturbation destroying the computation.
Fifth, the entire system must be economically and physically constructible, which at current hardware costs and energy requirements means costs in the hundreds of billions of dollars and power consumption measured in megawatts.
Each of these steps has an unknown solution timeline. None has a demonstrated path from current capability to required capability. The dependency chain is strict: you cannot do step three until step two is done, cannot do step two until step one is done.
“Years if not decades” is not a hedge. It is an honest statement that the first step has not been taken, that the path from step one to step five has no demonstrated segments, and that the total required progress is measured not in incremental improvements to existing technology but in the invention and integration of capabilities that currently do not exist.
Conclusion: The Timescale Is the Argument
The timescale story is not a peripheral detail of quantum computing. It is the central argument for why the technology cannot do what it is advertised to do.
Physical gates take nanoseconds. Physical qubits survive microseconds. Error correction cycles run in microseconds, just fast enough to catch errors before coherence is lost — but only if the classical decoder keeps up, which it currently cannot at scale. Logical Clifford gates take microseconds. Logical T gates take milliseconds. The full Shor’s algorithm computation takes days to weeks — and only that short if you deploy millions of physical qubits in parallel, running trillions of individual operations continuously at uniform sub-threshold error rates, controlled by classical infrastructure that does not exist, housed in cryogenic systems that have not been built, sustained for a duration that no quantum system has come close to demonstrating.
This is the distance from here to breaking one RSA key. One key. Once.
There are no working logical qubits. There is no demonstrated path to building them that shows the required scaling behaviour. The system that would run the computation has not been specified in engineering detail, let alone built. The power and infrastructure requirements, even in the optimistic case, are equivalent to a large industrial facility.
The people selling quantum computing as an imminent threat to encryption know these numbers. The Gidney papers are public. The surface code overhead is well understood. The classical decoder problem is a known open problem in the field. The magic state distillation cost is in every resource estimation paper.
They are not unaware of the timescales. They have chosen to present them in a way that obscures the cascade — to say “under a million qubits to crack RSA” without saying that no one has ever demonstrated even one logical qubit, that each logical qubit requires a thousand physical ones at error rates not demonstrated at scale, that the computation takes a week even in the optimistic case, that a week of continuous operation on a million-qubit cryogenic system is an engineering feat without precedent or demonstrated path.
Nanoseconds become microseconds. Microseconds become milliseconds. Milliseconds become hours. Hours become days. Days become weeks. And behind all of it is the single fact that has not changed: no logical qubit has ever been built.
The timescale is not a detail. The timescale is the truth.